{% extends 'base.html.twig' %} {% block title %}Cpu{% endblock %} {% block body %}

CPUs

{% for cpu in cpus %} {% else %} {% endfor %}
  Id Arch Model Socket(s) Part Number Lot Number uArch Code Name Speed C/T L1 Cache L2 Cache L3 Cache Igp Voltage Tdp ProcessNode Count Usable Received Link Notes
{{ cpu.id }} {{ cpu.architecture.value }} {{ cpu.brand.name }} {{ cpu.productLine }} {{ cpu.model }}
    {% for socket in cpu.sockets %}
  • {{ socket.name }}
  • {% endfor %}
{{ cpu.partNumber }} {{ cpu.lotNumber }} {{ cpu.microArchitecture }} {{ cpu.codeName }} {{ cpu.baseSpeed }} {% if cpu.boostSpeed > 0 %} -{{ cpu.boostSpeed }} {% endif %} {{ cpu.cores }} / {{ cpu.threads }} {% if cpu.L1uCount > 0 %} {{ cpu.L1uCount }}x {{ cpu.L1uSize }}KB {{ cpu.L1uWay }}-way {% endif %} {% if cpu.L1cCount > 0 %} {{ cpu.L1cCount }}x {{ cpu.L1dSize }}KB {{ cpu.L1dWay }}-way data, {{ cpu.L1dCount }}x {{ cpu.L1cSize }}KB {{ cpu.L1cWay }}-way instruction {% endif %} {% if cpu.L2Count > 0 %} {{ cpu.L2Count }}x {{ cpu.L2Size }}KB {{ cpu.L2Way }}-way {% endif %} {% if cpu.L3Count > 0 %} {{ cpu.L3Count }}x {{ cpu.L3Size }}KB {{ cpu.L3Way }}-way {% endif %} {{ cpu.igp }} {{ cpu.voltage }} {{ cpu.tdp }} {{ cpu.processNode }} {{ cpu.count }} {{ cpu.usable ? 'Yes' : 'No' }} {{ cpu.received ? 'Yes' : 'No' }} {{ cpu.link }} {{ cpu.notes }}
no records found
{% endblock %}